ASIC / RTL / Logic Design Engineer

Larsen & Toubro
Applicants0
Posted24 days ago

Job Highlights

Experience0 - 6 Yrs
Salary6-11 LPA
LocationCoimbatore
Work ModelHybrid
RoleASIC / RTL / Logic Design Engineer
Openings3
EmploymentContract
EducationM.Tech

Required Skills

Verilog/VHDLRTL DesignLogic SynthesisTiming Analysis (STA)Digital DesignASIC Design FlowVerification Methodologies (e.g., UVM)Problem-solvingTeamworkCommunication SkillsTechnical Documentation

Job Description

Role Summary: We are seeking a highly motivated and skilled ASIC / RTL / Logic Design Engineer to join our dynamic engineering team. The successful candidate will be responsible for the design, verification, and implementation of complex digital logic circuits for our cutting-edge projects in the Engineering & Construction domain.

Key Responsibilities:
- Design and develop RTL (Register Transfer Level) code for digital ASIC designs using Verilog or VHDL.
- Perform logic synthesis, timing analysis, and power optimization.
- Collaborate with verification engineers to develop testbenches and debug simulation failures.
- Participate in architectural discussions and contribute to the overall design strategy.
- Work closely with physical design teams for floor planning, placement, and routing.
- Ensure design meets performance, power, and area (PPA) targets.
- Document design specifications and verification plans.
- Stay updated with the latest advancements in ASIC design methodologies and technologies.

About Larsen & Toubro

Larsen & Toubro (L&T) is a major Indian multinational conglomerate headquartered in Mumbai, India. It is one of the largest and most respected companies in India's private sector. L&T operates in over 30 countries and is involved in a wide range of industries including engineering and construction, manufacturing, information technology, and financial services. The company has a strong legacy of executing complex and large-scale infrastructure projects across India and globally.

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