Design Verification Engineer

We are seeking a highly motivated and experienced Design Verification Engineer to join our dynamic R&D team. The successful candidate will be responsible for verifying the design and functionality of complex automotive electronic control units (ECUs) and embedded systems. This role involves developing and executing comprehensive verification plans, creating testbenches using SystemVerilog/UVM, performing simulations, and debugging hardware designs. You will work closely with the design team to ensure that our products meet the highest standards of quality, performance, and reliability.

Responsibilities:

• Develop and maintain detailed verification plans and methodologies.
• Design and implement complex verification environments using SystemVerilog and UVM.
• Execute simulations and analyze results to identify and debug design issues.
• Collaborate with hardware design engineers to resolve verification failures.
• Contribute to the improvement of verification processes and tools.
• Ensure adherence to automotive industry standards and best practices.