Physical Design / Layout Engineer

We are seeking a skilled and experienced Physical Design / Layout Engineer to join our growing team. The ideal candidate will be responsible for the physical implementation of integrated circuits (ICs) from netlist to GDSII, ensuring optimal performance, power, and area. This role requires a deep understanding of semiconductor design flows and advanced layout techniques within the context of a dynamic hospitality technology environment.

Key Responsibilities:

• Perform block-level and chip-level physical design, including floorplanning, placement, clock tree synthesis (CTS), routing, and timing closure.
• Develop and execute advanced layout strategies to meet stringent performance, power, and area (PPA) targets.
• Conduct design rule checking (DRC) and layout versus schematic (LVS) verification to ensure design integrity.
• Collaborate with RTL designers, verification engineers, and other cross-functional teams to resolve design issues and achieve project goals.
• Optimize designs for manufacturability (DFM) and yield.
• Participate in technology node evaluation and selection for future projects.
• Develop and maintain custom scripts for automation of physical design tasks.